Modelica definition
model Ground
extends INTERFACE.OnePin;
equation
{p.vDC,p.vTran,p.vAC_Re,p.vAC_Im} = zeros(4);
end Ground;
Parameters
| Name | Default | Description |
| HIDDEN_COMPONENT | false | Enable or disable log |
| R | 1000 | Resistance [Ohm] |
Modelica definition
model Rbreak
extends INTERFACE.TwoPin;
extends INIT.Part;
parameter Boolean HIDDEN_COMPONENT=false "Enable or disable log";
parameter SI.Resistance R=1000 "Resistance";
constant SI.Resistance R_EPS=2e-4 "IC resistor";
SI.Voltage vDC "DC voltage across the component";
SI.Voltage vTran "Transient voltage across the component";
SI.Voltage vAC_Re
"Real part of AC small-signal voltage across the component";
SI.Voltage vAC_Im
"Imaginary part of AC small-signal voltage across the component";
SI.Current iDC "DC current";
SI.Current iTran "Transient/Small-signal current";
SI.Current iAC_Re "Small-signal current. Real part";
SI.Current iAC_Im "Small-signal current. Imaginary part";
SI.Voltage vAC_mag(start=0)
"Magnitude of AC small-signal voltage across the component";
SI.Voltage vAC_mag_dB(start=0)
"Magnitude (dB) of AC small-signal voltage across the component";
nonSI.Angle_deg vAC_phase(start=0)
"Phase (deg) of AC small-signal voltage across the component";
SI.Current iAC_mag(start=0) "Magnitude of AC small-signal current";
SI.Current iAC_mag_dB(start=0) "Magnitude (dB) of AC small-signal current";
nonSI.Angle_deg iAC_phase(start=0)
"Phase (deg) of AC small-signal current";
SI.Voltage pinP_vAC_mag(start=0);
SI.Voltage pinP_vAC_phase(start=0);
SI.Voltage pinP_vAC_mag_dB(start=0);
SI.Voltage pinN_vAC_mag(start=0);
SI.Voltage pinN_vAC_phase(start=0);
SI.Voltage pinN_vAC_mag_dB(start=0);
protected
SI.Current iDCclampP;
SI.Current iDCclampN;
SI.Voltage vDCclampP(start=0);
SI.Voltage vDCclampN(start=0);
equation
// ------------------------------------------------
// i, v sign criterion: Positive current flows from
// the (+) node through the part to the (-) node
// ------------------------------------------------
{iDC,iTran,iAC_Re,iAC_Im} = {p.iDC + iDCclampP,p.iTran,p.iAC_Re,p.iAC_Im};
{iDC,iTran,iAC_Re,iAC_Im} = -{n.iDC + iDCclampN,n.iTran,n.iAC_Re,n.iAC_Im};
{vDC,vTran,vAC_Re,vAC_Im} = {p.vDC,p.vTran,p.vAC_Re,p.vAC_Im} - {n.vDC,n.
vTran,n.vAC_Re,n.vAC_Im};
// ------------
// Static model
// ------------
vDC = R*iDC;
when ctrl_RBREAK_Tran2DC then
vDCclampP = p.vTran;
vDCclampN = n.vTran;
end when;
{iDCclampP,iDCclampN} = if ctrl_RBREAK_Tran2DC then {vDCclampP - p.vDC,
vDCclampN - n.vDC}/R_EPS else zeros(2);
// ---------------
// Transient model
// ---------------
vTran = R*iTran;
// ---------------------
// AC small-signal model
// ---------------------
{vAC_Re,vAC_Im} = R*{iAC_Re,iAC_Im};
(pinP_vAC_mag,pinP_vAC_phase) = Rect2Polar({p.vAC_Re,p.vAC_Im});
pinP_vAC_mag_dB = Decibels(pinP_vAC_mag);
(pinN_vAC_mag,pinN_vAC_phase) = Rect2Polar({n.vAC_Re,n.vAC_Im});
pinN_vAC_mag_dB = Decibels(pinN_vAC_mag);
(vAC_mag,vAC_phase) = Rect2Polar({vAC_Re,vAC_Im});
vAC_mag_dB = Decibels(vAC_mag);
(iAC_mag,iAC_phase) = Rect2Polar({iAC_Re,iAC_Im});
iAC_mag_dB = Decibels(iAC_mag);
// ---------------------------
// Log static analysis results
// ---------------------------
when ctrl_log_DC and ((HIDDEN_COMPONENT == false) or (LOG_RESULTS == 2 and
HIDDEN_COMPONENT == true)) then
LogVariable(p.vDC);
LogVariable(n.vDC);
end when;
when ctrl_log_DC and ((HIDDEN_COMPONENT == false and LOG_RESULTS > 0) or (
HIDDEN_COMPONENT == true and LOG_RESULTS == 2)) then
LogVariable(vDC);
LogVariable(iDC);
end when;
// ---------------------------
// Log AC small-signal results
// ---------------------------
when ctrl_log_AC and (HIDDEN_COMPONENT == false or LOG_RESULTS == 2 and
HIDDEN_COMPONENT == true) then
LogVariable(pinP_vAC_mag);
LogVariable(pinP_vAC_phase);
LogVariable(pinP_vAC_mag_dB);
LogVariable(pinN_vAC_mag);
LogVariable(pinN_vAC_phase);
LogVariable(pinN_vAC_mag_dB);
end when;
when ctrl_log_AC and (HIDDEN_COMPONENT == false and LOG_RESULTS > 0 or
HIDDEN_COMPONENT == true and LOG_RESULTS == 2) then
LogVariable(vAC_mag);
LogVariable(vAC_mag_dB);
LogVariable(vAC_phase);
LogVariable(iAC_mag);
LogVariable(iAC_mag_dB);
LogVariable(iAC_phase);
end when;
end Rbreak;
Parameters
| Name | Default | Description |
| C | 1E-9 | Capacitance [F] |
| IC_ENABLED | false | IC enabled |
| IC | 0 | Initial voltage [V] |
Modelica definition
model Cbreak
extends INTERFACE.TwoPin;
parameter SI.Capacitance C=1E-9 "Capacitance";
parameter Boolean IC_ENABLED=false "IC enabled";
parameter SI.Voltage IC=0 "Initial voltage";
constant SI.Resistance R_eps2=2e-4 "Resistance to avoid high index problems";
SI.Voltage vDC "DC voltage across the capacitor";
SI.Voltage vTran "Transient voltage across the capacitor";
SI.Voltage vAC_Re
"Real part of AC small-signal voltage across the capacitor";
SI.Voltage vAC_Im
"Imaginary part of AC small-signal voltage across the capacitor";
SI.Current iDC "DC current";
SI.Current iTran "Transient/Small-signal current";
SI.Current iAC_Re "Small-signal current. Real part";
SI.Current iAC_Im "Small-signal current. Imaginary part";
SI.Voltage vAC_mag(start=0)
"Magnitude of AC small-signal voltage across the component";
SI.Voltage vAC_mag_dB(start=0)
"Magnitude (dB) of AC small-signal voltage across the component";
nonSI.Angle_deg vAC_phase(start=0)
"Phase (deg) of AC small-signal voltage across the component";
SI.Current iAC_mag(start=0) "Magnitude of AC small-signal current";
SI.Current iAC_mag_dB(start=0) "Magnitude (dB) of AC small-signal current";
nonSI.Angle_deg iAC_phase(start=0)
"Phase (deg) of AC small-signal current";
SI.Voltage pinP_vAC_mag(start=0);
SI.Voltage pinP_vAC_phase(start=0);
SI.Voltage pinP_vAC_mag_dB(start=0);
SI.Voltage pinN_vAC_mag(start=0);
SI.Voltage pinN_vAC_phase(start=0);
SI.Voltage pinN_vAC_mag_dB(start=0);
Capacitor1 Capacitor(
C=C,
IC=IC,
IC_ENABLED=IC_ENABLED);
Rbreak R_EPS2(HIDDEN_COMPONENT=true, R=R_eps2)
"Resistor to avoid high index problems";
equation
{iDC,iTran,iAC_Re,iAC_Im} = {p.iDC,p.iTran,p.iAC_Re,p.iAC_Im};
{vDC,vTran,vAC_Re,vAC_Im} = {p.vDC,p.vTran,p.vAC_Re,p.vAC_Im} - {n.vDC,n.
vTran,n.vAC_Re,n.vAC_Im};
(pinP_vAC_mag,pinP_vAC_phase) = Rect2Polar({p.vAC_Re,p.vAC_Im});
pinP_vAC_mag_dB = Decibels(pinP_vAC_mag);
(pinN_vAC_mag,pinN_vAC_phase) = Rect2Polar({n.vAC_Re,n.vAC_Im});
pinN_vAC_mag_dB = Decibels(pinN_vAC_mag);
(vAC_mag,vAC_phase) = Rect2Polar({vAC_Re,vAC_Im});
vAC_mag_dB = Decibels(vAC_mag);
(iAC_mag,iAC_phase) = Rect2Polar({iAC_Re,iAC_Im});
iAC_mag_dB = Decibels(iAC_mag);
connect(R_EPS2.n, n);
connect(p, Capacitor.p);
connect(Capacitor.n, R_EPS2.p);
end Cbreak;
Parameters
| Name | Default | Description |
| IC | 0 | Initial current [V] |
| IC_ENABLED | false | IC enabled |
| L | 1E-5 | Inductance [H] |
Modelica definition
model Lbreak
extends Inductor;
parameter SI.Inductance L=1E-5 "Inductance";
Real der_iTran "Voltage derivative [V/s]";
equation
// ---------------
// Transient model
// ---------------
der_iTran = der(iTran);
Lvar*der_iTran = vTran;
Lvar = L;
LvarAC = L;
end Lbreak;
Parameters
| Name | Default | Description |
| HIDDEN_COMPONENT | false | Enable or disable log |
| IS | 1e-14 | Saturation current [A] |
| RS | 10 | Ohmic Resistance [Ohm] |
| N | 1 | Emission coefficient |
| TT | 0 | Transit time [s] |
| CJ0 | 1e-6 | zero-bias junction capacitance [F] |
| VJ | 1 | Junction potential [V] |
| M | 0.5 | grading coefficient |
| FC | 0.5 | Coefficient for forward-bias depletion capacitance formula |
| BV | 1e40 | reverse breakdown voltage (positive number) [V] |
| IKF | -1 | High injection knee current [A] |
| ISR | 1e-14 | Recombination current [A] |
| NR | 1 | Emission coefficient for ISR |
| IBV | 1e-3 | Reverse breakdown current (positive number) [A] |
Modelica definition
model PSPICE_diode
extends INTERFACE.TwoPin;
extends INIT.Part;
parameter Boolean HIDDEN_COMPONENT=false "Enable or disable log";
parameter SI.Current IS=1e-14 "Saturation current";
parameter SI.Resistance RS=10 "Ohmic Resistance";
parameter Real N=1 "Emission coefficient";
parameter SI.Time TT=0 "Transit time";
parameter SI.Capacitance CJ0=1e-6 "zero-bias junction capacitance";
parameter SI.Voltage VJ=1 "Junction potential";
parameter Real M=0.5 "grading coefficient";
parameter Real FC=0.5
"Coefficient for forward-bias depletion capacitance formula";
parameter SI.Voltage BV=1e40 "reverse breakdown voltage (positive number)";
parameter SI.Current IKF=-1 "High injection knee current";
parameter SI.Current ISR=1e-14 "Recombination current";
parameter Real NR=1 "Emission coefficient for ISR";
parameter SI.Current IBV=1e-3 "Reverse breakdown current (positive number)";
SI.Voltage vDC "DC voltage between pines";
SI.Voltage vTran "Transient voltage between pines";
SI.Voltage vAC_Re "Real part of AC small-signal voltage between pines";
SI.Voltage vAC_Im
"Imaginary part of AC small-signal voltage between pines";
SI.Current iDC "DC current";
SI.Current iTran "Transient/Small-signal current";
SI.Current iAC_Re "Small-signal current. Real part";
SI.Current iAC_Im "Small-signal current. Imaginary part";
SI.Voltage vAC_mag(start=0)
"Magnitude of AC small-signal voltage across the component";
SI.Voltage vAC_mag_dB(start=0)
"Magnitude (dB) of AC small-signal voltage across the component";
nonSI.Angle_deg vAC_phase(start=0)
"Phase (deg) of AC small-signal voltage across the component";
SI.Current iAC_mag(start=0) "Magnitude of AC small-signal current";
SI.Current iAC_mag_dB(start=0) "Magnitude (dB) of AC small-signal current";
nonSI.Angle_deg iAC_phase(start=0)
"Phase (deg) of AC small-signal current";
SI.Voltage pinP_vAC_mag(start=0);
SI.Voltage pinP_vAC_phase(start=0);
SI.Voltage pinP_vAC_mag_dB(start=0);
SI.Voltage pinN_vAC_mag(start=0);
SI.Voltage pinN_vAC_phase(start=0);
SI.Voltage pinN_vAC_mag_dB(start=0);
DIODE_PSPICE.I_DIODE I_diode(
IS=IS,
BV=BV,
N=N,
IKF=IKF,
ISR=ISR,
NR=NR,
IBV=IBV,
M=M,
VJ=VJ);
DIODE_PSPICE.C_DIODE Cdiode(
IS=IS,
BV=BV,
N=N,
TT=TT,
CJ0=CJ0,
M=M,
VJ=VJ,
FC=FC,
IKF=IKF,
ISR=ISR,
NR=NR,
IBV=IBV);
Rbreak Rs(R=RS, HIDDEN_COMPONENT=true);
equation
// For numerical efficiency
Cdiode.vTran = I_diode.vDiodeTran;
{iDC,iTran,iAC_Re,iAC_Im} = {p.iDC,p.iTran,p.iAC_Re,p.iAC_Im};
{vDC,vTran,vAC_Re,vAC_Im} = {p.vDC,p.vTran,p.vAC_Re,p.vAC_Im} - {n.vDC,n.
vTran,n.vAC_Re,n.vAC_Im};
(pinP_vAC_mag,pinP_vAC_phase) = Rect2Polar({p.vAC_Re,p.vAC_Im});
pinP_vAC_mag_dB = Decibels(pinP_vAC_mag);
(pinN_vAC_mag,pinN_vAC_phase) = Rect2Polar({n.vAC_Re,n.vAC_Im});
pinN_vAC_mag_dB = Decibels(pinN_vAC_mag);
(vAC_mag,vAC_phase) = Rect2Polar({vAC_Re,vAC_Im});
vAC_mag_dB = Decibels(vAC_mag);
(iAC_mag,iAC_phase) = Rect2Polar({iAC_Re,iAC_Im});
iAC_mag_dB = Decibels(iAC_mag);
// ---------------------------
// Log static analysis results
// ---------------------------
when ctrl_log_DC and ((HIDDEN_COMPONENT == false) or (LOG_RESULTS == 2 and
HIDDEN_COMPONENT == true)) then
LogVariable(p.vDC);
LogVariable(n.vDC);
end when;
when ctrl_log_DC and ((HIDDEN_COMPONENT == false and LOG_RESULTS > 0) or (
HIDDEN_COMPONENT == true and LOG_RESULTS == 2)) then
LogVariable(vDC);
LogVariable(iDC);
end when;
// ---------------------------
// Log AC small-signal results
// ---------------------------
when ctrl_log_AC and (HIDDEN_COMPONENT == false or LOG_RESULTS == 2 and
HIDDEN_COMPONENT == true) then
LogVariable(pinP_vAC_mag);
LogVariable(pinP_vAC_phase);
LogVariable(pinP_vAC_mag_dB);
LogVariable(pinN_vAC_mag);
LogVariable(pinN_vAC_phase);
LogVariable(pinN_vAC_mag_dB);
end when;
when ctrl_log_AC and (HIDDEN_COMPONENT == false and LOG_RESULTS > 0 or
HIDDEN_COMPONENT == true and LOG_RESULTS == 2) then
LogVariable(vAC_mag);
LogVariable(vAC_mag_dB);
LogVariable(vAC_phase);
LogVariable(iAC_mag);
LogVariable(iAC_mag_dB);
LogVariable(iAC_phase);
end when;
connect(Cdiode.n, I_diode.n);
connect(Rs.n, I_diode.p);
connect(Rs.p, p);
connect(I_diode.n, n);
connect(Rs.n, Cdiode.p);
end PSPICE_diode;
Parameters
| Name | Default | Description |
| HIDDEN_COMPONENT | false | Enable or disable log |
| AD | 1e-8 | drain difussion area [m2] |
| AS | 1e-8 | Source difussion area [m2] |
| CGBO | 2e-10 | Gate-bulk overlap capacitance per meter [F/m] |
| CGDO | 4e-11 | Gate-drain overlap capacitance per meter [F/m] |
| CGSO | 4e-11 | Gate-source overlap capacitance per meter [F/m] |
| CJ | 2e-4 | Capacitance at zero-bias voltage per square meter of area [F/m2] |
| CJSW | 1e-9 | Capacitance at zero-bias voltage per meter of perimeter [F/m] |
| FC | 0.5 | Substrate-junction forward-bias coefficient |
| GAMMA | 0.526 | Body-effect parameter [V0.5] |
| IS | 1e-14 | Reverse saturation current at 300K [A] |
| KP | 27.6e-6 | Transconductance parameter [A/V2] |
| L | 100e-6 | Gate length [m] |
| LAMBDA | 0.00 | Channel-length modulation [V-1] |
| LD | 0.8e-6 | Lateral diffusion [m] |
| MJ | 0.5 | Bulk junction capacitnce grading coefficient |
| MJSW | 0.33 | Perimeter capacitance grading coefficient |
| PD | 4e-4 | drain difussion perimeter [m] |
| PS | 4e-4 | source difussion perimeter [m] |
| PB | 0.75 | Junction potencial [V] |
| PHI | 0.65 | Surface inversion potencial [V] |
| RD | 10 | Drain ohmic resistance [Ohm] |
| RS | 10 | Source ohmic resistance [Ohm] |
| RB | 10 | Bulk ohmic resistance [Ohm] |
| RG | 10 | Gate ohmic resistance [Ohm] |
| TOX | 1e-7 | Gate oxide thickness [m] |
| VTO | 1 | Zero-bias threshold voltage [V] |
| W | 100e-6 | Gate width [m] |
| RSB | 1e-4 | Source-Bulk junction resistance [Ohm] |
| RDB | 1e-4 | Drain-Bulk junction resistance [Ohm] |
Modelica definition
model Spice2MOS1
extends INTERFACE.MOSFET;
extends INIT.Part;
inner SI.Voltage vdsDC "Drain to source voltage";
inner SI.Voltage vgsDC "Gate to source voltage";
inner SI.Voltage vbsDC "Bulk to source voltage";
inner SI.Voltage vdsTran "Drain to source voltage";
inner SI.Voltage vgsTran "Gate to source voltage";
inner SI.Voltage vbsTran "Bulk to source voltage";
SI.Voltage drain_vAC_mag "Magnitude of AC small-signal drain voltage";
SI.Voltage drain_vAC_mag_dB
"Magnitude (dB) of AC small-signal drain voltage";
nonSI.Angle_deg drain_vAC_phase(start=0)
"Phase (deg) of AC small-signal drain voltage";
SI.Voltage source_vAC_mag "Magnitude of AC small-signal source voltage";
SI.Voltage source_vAC_mag_dB
"Magnitude (dB) of AC small-signal source voltage";
nonSI.Angle_deg source_vAC_phase(start=0)
"Phase (deg) of drain AC small-signal source voltage";
SI.Voltage bulk_vAC_mag "Magnitude of AC small-signal bulk voltage";
SI.Voltage bulk_vAC_mag_dB
"Magnitude (dB) of AC small-signal bulk voltage";
nonSI.Angle_deg bulk_vAC_phase(start=0)
"Phase (deg) of AC small-signal bulk voltage";
SI.Voltage gate_vAC_mag "Magnitude of AC small-signal gate voltage";
SI.Voltage gate_vAC_mag_dB
"Magnitude (dB) of AC small-signal gate voltage";
nonSI.Angle_deg gate_vAC_phase(start=0)
"Phase (deg) of AC small-signal gate voltage";
SI.Current drain_iAC_mag "Magnitude of AC small-signal drain current";
SI.Current drain_iAC_mag_dB
"Magnitude (dB) of AC small-signal drain current";
nonSI.Angle_deg drain_iAC_phase(start=0)
"Phase (deg) of AC small-signal drain current";
SI.Current source_iAC_mag "Magnitude of AC small-signal source current";
SI.Current source_iAC_mag_dB
"Magnitude (dB) of AC small-signal source current";
nonSI.Angle_deg source_iAC_phase(start=0)
"Phase (deg) of drain AC small-signal source current";
SI.Current bulk_iAC_mag "Magnitude of AC small-signal bulk current";
SI.Current bulk_iAC_mag_dB
"Magnitude (dB) of AC small-signal bulk current";
nonSI.Angle_deg bulk_iAC_phase(start=0)
"Phase (deg) of AC small-signal bulk current";
SI.Current gate_iAC_mag "Magnitude of AC small-signal gate current";
SI.Current gate_iAC_mag_dB
"Magnitude (dB) of AC small-signal gate current";
nonSI.Angle_deg gate_iAC_phase(start=0)
"Phase (deg) of AC small-signal gate current";
parameter Boolean HIDDEN_COMPONENT=false "Enable or disable log";
parameter SI.Area AD=1e-8 "drain difussion area";
parameter SI.Area AS=1e-8 "Source difussion area";
parameter Real CGBO=2e-10 "Gate-bulk overlap capacitance per meter [F/m]";
parameter Real CGDO=4e-11 "Gate-drain overlap capacitance per meter [F/m]";
parameter Real CGSO=4e-11 "Gate-source overlap capacitance per meter [F/m]";
parameter Real CJ=2e-4
"Capacitance at zero-bias voltage per square meter of area [F/m2]";
parameter Real CJSW=1e-9
"Capacitance at zero-bias voltage per meter of perimeter [F/m]";
parameter Real FC=0.5 "Substrate-junction forward-bias coefficient";
parameter Real GAMMA=0.526 "Body-effect parameter [V0.5]";
parameter SI.Current IS=1e-14 "Reverse saturation current at 300K";
parameter Real KP=27.6e-6 "Transconductance parameter [A/V2]";
parameter SI.Length L=100e-6 "Gate length";
parameter Real LAMBDA=0.00 "Channel-length modulation [V-1]";
parameter SI.Length LD=0.8e-6 "Lateral diffusion";
parameter Real MJ=0.5 "Bulk junction capacitnce grading coefficient";
parameter Real MJSW=0.33 "Perimeter capacitance grading coefficient";
parameter SI.Length PD=4e-4 "drain difussion perimeter";
parameter SI.Length PS=4e-4 "source difussion perimeter";
parameter SI.Voltage PB=0.75 "Junction potencial";
parameter SI.Voltage PHI=0.65 "Surface inversion potencial";
parameter SI.Resistance RD=10 "Drain ohmic resistance";
parameter SI.Resistance RS=10 "Source ohmic resistance";
parameter SI.Resistance RB=10 "Bulk ohmic resistance";
parameter SI.Resistance RG=10 "Gate ohmic resistance";
parameter SI.Length TOX=1e-7 "Gate oxide thickness";
parameter SI.Voltage VTO=1 "Zero-bias threshold voltage";
parameter SI.Length W=100e-6 "Gate width";
constant Real EPSR=3.9 "Dielectric constant of the oxide";
parameter SI.Resistance RSB=1e-4 "Source-Bulk junction resistance";
parameter SI.Resistance RDB=1e-4 "Drain-Bulk junction resistance";
protected
inner SI.Voltage vdsDCSgn "Drain-pin to source-pin voltage";
inner SI.Voltage vthDC "Threshold voltage";
inner SI.Voltage vdsTranSgn "Drain-pin to source-pin voltage";
inner SI.Voltage vthTran "Threshold voltage";
inner SI.Voltage gate_vAC_Re;
inner SI.Voltage gate_vAC_Im;
inner SI.Voltage bulk_vAC_Re;
inner SI.Voltage bulk_vAC_Im;
// --------------------
// Drain-Source current
// --------------------
SPICE2_MOS1.Ids Ids(
VTO=VTO,
GAMMA=GAMMA,
PHI=PHI,
KP=KP,
W=W,
L=L,
LD=LD,
LAMBDA=LAMBDA);
// --------------------
// Source-Bulk junction
// --------------------
SPICE2_MOS1.Idiode Dbs(IS=IS);
SPICE2_MOS1.Cdiode Cbs(
CJ=CJ,
CJSW=CJSW,
MJ=MJ,
MJSW=MJSW,
FC=FC,
PB=PB,
P=PS,
A=AS);
// -------------------
// Drain-Bulk junction
// -------------------
SPICE2_MOS1.Idiode Dbd(IS=IS);
SPICE2_MOS1.Cdiode Cbd(
CJ=CJ,
CJSW=CJSW,
MJ=MJ,
MJSW=MJSW,
FC=FC,
PB=PB,
P=PD,
A=AD);
// ----------------
// Gate capacitance
// ----------------
SPICE2_MOS1.Cgd Cgd(
PHI=PHI,
LD=LD,
W=W,
L=L,
TOX=TOX,
EPSR=EPSR,
CGDO=CGDO,
CGSO=CGSO,
gateSourcePinsC=false);
SPICE2_MOS1.Cgd Cgs(
PHI=PHI,
LD=LD,
W=W,
L=L,
TOX=TOX,
EPSR=EPSR,
CGDO=CGDO,
CGSO=CGSO,
gateSourcePinsC=true);
SPICE2_MOS1.Cgb Cgb(
PHI=PHI,
LD=LD,
W=W,
L=L,
TOX=TOX,
EPSR=EPSR,
CGBO=CGBO);
// ---------------
// Drain resistors
// ---------------
Rbreak Rs(R=RS, HIDDEN_COMPONENT=true);
Rbreak Rd(R=RD, HIDDEN_COMPONENT=true);
// -------------
// Gate resistor
// -------------
Rbreak Rg(R=RG, HIDDEN_COMPONENT=true);
// -------------
// Bulk resistor
// -------------
Rbreak Rb(R=RB, HIDDEN_COMPONENT=true);
Rbreak Rsb(HIDDEN_COMPONENT=true, R=RSB);
Rbreak Rdb(HIDDEN_COMPONENT=true, R=RDB);
equation
// ----------------------------------
// Source-bulk junction: to avoid SSE
// ----------------------------------
Dbs.vDiodeTran = Cbs.vTran;
// ---------------------------------
// Drain-bulk junction: to avoid SSE
// ---------------------------------
Dbd.vDiodeTran = Cbd.vTran;
// -----------------
// Threshold voltage
// -----------------
vthDC = VTO + GAMMA*(sqrt(abs(PHI - vbsDC)) - sqrt(PHI));
vthTran = VTO + GAMMA*(sqrt(abs(PHI - vbsTran)) - sqrt(PHI));
// ---
// Vds
// ---
vdsDC = noEvent(abs(Ids.vDC));
vdsDCSgn = Ids.vDC;
vdsTran = noEvent(abs(Cgs.vTran - Cgd.vTran));
vdsTranSgn = Cgs.vTran - Cgd.vTran;
// ---
// Vgs
// ---
vgsDC = max({Cgs.vDC,Cgd.vDC});
vgsTran = max({Cgs.vTran,Cgd.vTran});
// ---
// Vbs
// ---
vbsDC = max({Cbs.vDC,Cbd.vDC});
vbsTran = max({Cbs.vTran,Cbd.vTran});
// ------------------------------------
// Gate & bulk AC small-signal voltages
// ------------------------------------
gate_vAC_Re = g.vAC_Re;
gate_vAC_Im = g.vAC_Im;
bulk_vAC_Re = b.vAC_Re;
bulk_vAC_Im = b.vAC_Im;
(drain_vAC_mag,drain_vAC_phase) = Rect2Polar({d.vAC_Re,d.vAC_Im});
drain_vAC_mag_dB = Decibels(drain_vAC_mag);
(drain_iAC_mag,drain_iAC_phase) = Rect2Polar({d.iAC_Re,d.iAC_Im});
drain_iAC_mag_dB = Decibels(drain_iAC_mag);
(source_vAC_mag,source_vAC_phase) = Rect2Polar({s.vAC_Re,s.vAC_Im});
source_vAC_mag_dB = Decibels(source_vAC_mag);
(source_iAC_mag,source_iAC_phase) = Rect2Polar({s.iAC_Re,s.iAC_Im});
source_iAC_mag_dB = Decibels(source_iAC_mag);
(bulk_vAC_mag,bulk_vAC_phase) = Rect2Polar({b.vAC_Re,b.vAC_Im});
bulk_vAC_mag_dB = Decibels(bulk_vAC_mag);
(bulk_iAC_mag,bulk_iAC_phase) = Rect2Polar({b.iAC_Re,b.iAC_Im});
bulk_iAC_mag_dB = Decibels(bulk_iAC_mag);
(gate_vAC_mag,gate_vAC_phase) = Rect2Polar({g.vAC_Re,g.vAC_Im});
gate_vAC_mag_dB = Decibels(gate_vAC_mag);
(gate_iAC_mag,gate_iAC_phase) = Rect2Polar({g.iAC_Re,g.iAC_Im});
gate_iAC_mag_dB = Decibels(gate_iAC_mag);
when ctrl_log_DC and ((HIDDEN_COMPONENT == false) or (LOG_RESULTS == 2 and
HIDDEN_COMPONENT == true)) then
LogVariable(g.vDC);
LogVariable(d.vDC);
LogVariable(s.vDC);
LogVariable(b.vDC);
end when;
when ctrl_log_DC and ((HIDDEN_COMPONENT == false and LOG_RESULTS > 0) or (
HIDDEN_COMPONENT == true and LOG_RESULTS == 2)) then
LogVariable(vdsDC);
LogVariable(vbsDC);
LogVariable(vgsDC);
end when;
// ---------------------
// Component connections
// ---------------------
connect(d, Rd.p);
connect(Rd.n, Ids.p);
connect(Ids.n, Rs.p);
connect(Rs.n, s);
connect(Rg.n, Cgd.p);
connect(Rg.n, Cgs.p);
connect(Rg.n, Cgb.p);
connect(Rg.p, g);
connect(Rb.n, Dbs.p);
connect(Rb.n, Cbs.p);
connect(Rb.n, Dbd.p);
connect(Rb.n, Cbd.p);
connect(Rb.n, Cgb.n);
connect(b, Rb.p);
connect(Ids.n, Cgs.n);
// connect(Ids.n, Rbs.n);
connect(Ids.p, Cgd.n);
// connect(Ids.p, Rbd.n);
connect(Rsb.p, Cbs.n);
connect(Rsb.n, Ids.n);
connect(Rdb.p, Cbd.n);
connect(Rdb.n, Rd.n);
connect(Cbd.n, Dbd.n);
connect(Dbs.n, Cbs.n);
end Spice2MOS1;
Parameters
| Name | Default | Description |
| HIDDEN_COMPONENT | false | Enable or disable log |
| AD | 1e-8 | drain difussion area [m2] |
| AS | 1e-8 | Source difussion area [m2] |
| CGBO | 2e-10 | Gate-bulk overlap capacitance per meter [F/m] |
| CGDO | 4e-11 | Gate-drain overlap capacitance per meter [F/m] |
| CGSO | 4e-11 | Gate-source overlap capacitance per meter [F/m] |
| CJ | 2e-4 | Capacitance at zero-bias voltage per squere meter of area [F/m2] |
| CJSW | 1e-9 | Capacitance at zero-bias voltage per meter of perimeter [F/m] |
| FC | 0.5 | Substrate-junction forward-bias coefficient |
| GAMMA | 0.526 | Body-effect parameter [V0.5] |
| IS | 1e-14 | Reverse saturation current at 300K [A] |
| KP | 27.6e-6 | Transconductance parameter [A/V2] |
| L | 100e-6 | Gate length [m] |
| LAMBDA | 0.00 | Channel-length modulation [V-1] |
| LD | 0.8e-6 | Lateral diffusion [m] |
| MJ | 0.5 | Bulk junction capacitnce grading coefficient |
| MJSW | 0.33 | Perimeter capacitance grading coefficient |
| PD | 4e-4 | drain difussion perimeter [m] |
| PS | 4e-4 | source difussion perimeter [m] |
| PB | 0.75 | Junction potencial [V] |
| PHI | 0.65 | Surface inversion potencial [V] |
| RD | 10 | Drain ohmic resistance [Ohm] |
| RS | 10 | Source ohmic resistance [Ohm] |
| RB | 10 | Bulk ohmic resistance [Ohm] |
| RG | 10 | Gate ohmic resistance [Ohm] |
| TOX | 1e-7 | Gate oxide thickness [m] |
| VTO | -1 | Zero-bias threshold voltage [V] |
| W | 100e-6 | Gate width [m] |
| RSB | 1e-4 | Source-Bulk junction resistance [Ohm] |
| RDB | 1e-4 | Drain-Bulk junction resistance [Ohm] |
Modelica definition
model Spice2MOS1P
extends INTERFACE.MOSFET;
extends INIT.Part;
inner SI.Voltage vsdDC "Source to drain voltage";
inner SI.Voltage vsgDC "Source to gate voltage";
inner SI.Voltage vsbDC "Source to bulk voltage";
inner SI.Voltage vsdTran "Source to drain voltage";
inner SI.Voltage vsgTran "Source to gate voltage";
inner SI.Voltage vsbTran "Source to bulk voltage";
SI.Voltage drain_vAC_mag "Magnitude of AC small-signal drain voltage";
SI.Voltage drain_vAC_mag_dB
"Magnitude (dB) of AC small-signal drain voltage";
nonSI.Angle_deg drain_vAC_phase(start=0)
"Phase (deg) of AC small-signal drain voltage";
SI.Voltage source_vAC_mag "Magnitude of AC small-signal source voltage";
SI.Voltage source_vAC_mag_dB
"Magnitude (dB) of AC small-signal source voltage";
nonSI.Angle_deg source_vAC_phase(start=0)
"Phase (deg) of drain AC small-signal source voltage";
SI.Voltage bulk_vAC_mag "Magnitude of AC small-signal bulk voltage";
SI.Voltage bulk_vAC_mag_dB
"Magnitude (dB) of AC small-signal bulk voltage";
nonSI.Angle_deg bulk_vAC_phase(start=0)
"Phase (deg) of AC small-signal bulk voltage";
SI.Voltage gate_vAC_mag "Magnitude of AC small-signal gate voltage";
SI.Voltage gate_vAC_mag_dB
"Magnitude (dB) of AC small-signal gate voltage";
nonSI.Angle_deg gate_vAC_phase(start=0)
"Phase (deg) of AC small-signal gate voltage";
SI.Current drain_iAC_mag "Magnitude of AC small-signal drain current";
SI.Current drain_iAC_mag_dB
"Magnitude (dB) of AC small-signal drain current";
nonSI.Angle_deg drain_iAC_phase(start=0)
"Phase (deg) of AC small-signal drain current";
SI.Current source_iAC_mag "Magnitude of AC small-signal source current";
SI.Current source_iAC_mag_dB
"Magnitude (dB) of AC small-signal source current";
nonSI.Angle_deg source_iAC_phase(start=0)
"Phase (deg) of drain AC small-signal source current";
SI.Current bulk_iAC_mag "Magnitude of AC small-signal bulk current";
SI.Current bulk_iAC_mag_dB
"Magnitude (dB) of AC small-signal bulk current";
nonSI.Angle_deg bulk_iAC_phase(start=0)
"Phase (deg) of AC small-signal bulk current";
SI.Current gate_iAC_mag "Magnitude of AC small-signal gate current";
SI.Current gate_iAC_mag_dB
"Magnitude (dB) of AC small-signal gate current";
nonSI.Angle_deg gate_iAC_phase(start=0)
"Phase (deg) of AC small-signal gate current";
parameter Boolean HIDDEN_COMPONENT=false "Enable or disable log";
parameter SI.Area AD=1e-8 "drain difussion area";
parameter SI.Area AS=1e-8 "Source difussion area";
parameter Real CGBO=2e-10 "Gate-bulk overlap capacitance per meter [F/m]";
parameter Real CGDO=4e-11 "Gate-drain overlap capacitance per meter [F/m]";
parameter Real CGSO=4e-11 "Gate-source overlap capacitance per meter [F/m]";
parameter Real CJ=2e-4
"Capacitance at zero-bias voltage per squere meter of area [F/m2]";
parameter Real CJSW=1e-9
"Capacitance at zero-bias voltage per meter of perimeter [F/m]";
parameter Real FC=0.5 "Substrate-junction forward-bias coefficient";
parameter Real GAMMA=0.526 "Body-effect parameter [V0.5]";
parameter SI.Current IS=1e-14 "Reverse saturation current at 300K";
parameter Real KP=27.6e-6 "Transconductance parameter [A/V2]";
parameter SI.Length L=100e-6 "Gate length";
parameter Real LAMBDA=0.00 "Channel-length modulation [V-1]";
parameter SI.Length LD=0.8e-6 "Lateral diffusion";
parameter Real MJ=0.5 "Bulk junction capacitnce grading coefficient";
parameter Real MJSW=0.33 "Perimeter capacitance grading coefficient";
parameter SI.Length PD=4e-4 "drain difussion perimeter";
parameter SI.Length PS=4e-4 "source difussion perimeter";
parameter SI.Voltage PB=0.75 "Junction potencial";
parameter SI.Voltage PHI=0.65 "Surface inversion potencial";
parameter SI.Resistance RD=10 "Drain ohmic resistance";
parameter SI.Resistance RS=10 "Source ohmic resistance";
parameter SI.Resistance RB=10 "Bulk ohmic resistance";
parameter SI.Resistance RG=10 "Gate ohmic resistance";
parameter SI.Length TOX=1e-7 "Gate oxide thickness";
parameter SI.Voltage VTO=-1 "Zero-bias threshold voltage";
parameter SI.Length W=100e-6 "Gate width";
constant Real EPSR=3.9 "Dielectric constant of the oxide";
parameter SI.Resistance RSB=1e-4 "Source-Bulk junction resistance";
parameter SI.Resistance RDB=1e-4 "Drain-Bulk junction resistance";
protected
inner SI.Voltage vthDC "Threshold voltage";
inner SI.Voltage vsdDCSgn "Source-pin to drain-pin voltage";
inner SI.Voltage vsdTranSgn "Source-pin to drain-pin voltage";
inner SI.Voltage vthTran "Threshold voltage";
inner SI.Voltage gate_vAC_Re;
inner SI.Voltage gate_vAC_Im;
inner SI.Voltage bulk_vAC_Re;
inner SI.Voltage bulk_vAC_Im;
// --------------------
// Drain-Source current
// --------------------
SPICE2_MOS1P.Isd Isd(
VTO=VTO,
GAMMA=GAMMA,
PHI=PHI,
KP=KP,
W=W,
L=L,
LD=LD,
LAMBDA=LAMBDA);
// --------------------
// Source-Bulk junction
// --------------------
SPICE2_MOS1P.Idiode Dsb(IS=IS);
SPICE2_MOS1P.Cdiode Csb(
CJ=CJ,
CJSW=CJSW,
MJ=MJ,
MJSW=MJSW,
FC=FC,
PB=PB,
P=PS,
A=AS);
// -------------------
// Drain-Bulk junction
// -------------------
SPICE2_MOS1P.Idiode Ddb(IS=IS);
SPICE2_MOS1P.Cdiode Cdb(
CJ=CJ,
CJSW=CJSW,
MJ=MJ,
MJSW=MJSW,
FC=FC,
PB=PB,
P=PD,
A=AD);
// ----------------
// Gate capacitance
// ----------------
SPICE2_MOS1P.Cdg Cdg(
PHI=PHI,
LD=LD,
W=W,
L=L,
TOX=TOX,
EPSR=EPSR,
CGDO=CGDO,
CGSO=CGSO,
sourceGatePinsC=false);
SPICE2_MOS1P.Cdg Csg(
PHI=PHI,
LD=LD,
W=W,
L=L,
TOX=TOX,
EPSR=EPSR,
CGDO=CGDO,
CGSO=CGSO,
sourceGatePinsC=true);
SPICE2_MOS1P.Cbg Cbg(
PHI=PHI,
LD=LD,
W=W,
L=L,
TOX=TOX,
EPSR=EPSR,
CGBO=CGBO);
// ---------------
// Drain resistors
// ---------------
Rbreak Rs(R=RS, HIDDEN_COMPONENT=true);
Rbreak Rd(R=RD, HIDDEN_COMPONENT=true);
// -------------
// Gate resistor
// -------------
Rbreak Rg(R=RG, HIDDEN_COMPONENT=true);
// -------------
// Bulk resistor
// -------------
Rbreak Rb(R=RB, HIDDEN_COMPONENT=true);
Rbreak Rsb(HIDDEN_COMPONENT=true, R=RSB);
Rbreak Rdb(HIDDEN_COMPONENT=true, R=RDB);
equation
//----------------------------------
//Source-bulk junction: to avoid SSE
//----------------------------------
Dsb.vDiodeTran = Csb.vTran;
//----------------------------------
//Drain-bulk junction: to avoid SSE
//----------------------------------
Ddb.vDiodeTran = Cdb.vTran;
// -----------------
// Threshold voltage
// ----------------- -vsbDC
vthDC = (VTO - GAMMA*(sqrt(abs(PHI - vsbDC)) - sqrt(PHI)));
vthTran = (VTO - GAMMA*(sqrt(abs(PHI - vsbTran)) - sqrt(PHI)));
// ---
// Vsd
// ---
vsdDC = noEvent((abs(Isd.vDC)));
vsdDCSgn = Isd.vDC;
vsdTran = noEvent(abs(Csg.vTran - Cdg.vTran));
vsdTranSgn = Csg.vTran - Cdg.vTran;
// ---
// Vgs
// ---
vsgDC = max({Csg.vDC,Cdg.vDC});
vsgTran = max({Csg.vTran,Cdg.vTran});
// ---
// Vbs
// ---
vsbDC = max({Csb.vDC,Cdb.vDC});
vsbTran = max({Csb.vTran,Cdb.vTran});
// ------------------------------------
// Gate & bulk AC small-signal voltages
// ------------------------------------
gate_vAC_Re = g.vAC_Re;
gate_vAC_Im = g.vAC_Im;
bulk_vAC_Re = b.vAC_Re;
bulk_vAC_Im = b.vAC_Im;
(drain_vAC_mag,drain_vAC_phase) = Rect2Polar({d.vAC_Re,d.vAC_Im});
drain_vAC_mag_dB = Decibels(drain_vAC_mag);
(drain_iAC_mag,drain_iAC_phase) = Rect2Polar({d.iAC_Re,d.iAC_Im});
drain_iAC_mag_dB = Decibels(drain_iAC_mag);
(source_vAC_mag,source_vAC_phase) = Rect2Polar({s.vAC_Re,s.vAC_Im});
source_vAC_mag_dB = Decibels(source_vAC_mag);
(source_iAC_mag,source_iAC_phase) = Rect2Polar({s.iAC_Re,s.iAC_Im});
source_iAC_mag_dB = Decibels(source_iAC_mag);
(bulk_vAC_mag,bulk_vAC_phase) = Rect2Polar({b.vAC_Re,b.vAC_Im});
bulk_vAC_mag_dB = Decibels(bulk_vAC_mag);
(bulk_iAC_mag,bulk_iAC_phase) = Rect2Polar({b.iAC_Re,b.iAC_Im});
bulk_iAC_mag_dB = Decibels(bulk_iAC_mag);
(gate_vAC_mag,gate_vAC_phase) = Rect2Polar({g.vAC_Re,g.vAC_Im});
gate_vAC_mag_dB = Decibels(gate_vAC_mag);
(gate_iAC_mag,gate_iAC_phase) = Rect2Polar({g.iAC_Re,g.iAC_Im});
gate_iAC_mag_dB = Decibels(gate_iAC_mag);
when ctrl_log_DC and ((HIDDEN_COMPONENT == false) or (LOG_RESULTS == 2 and
HIDDEN_COMPONENT == true)) then
LogVariable(g.vDC);
LogVariable(d.vDC);
LogVariable(s.vDC);
LogVariable(b.vDC);
end when;
when ctrl_log_DC and ((HIDDEN_COMPONENT == false and LOG_RESULTS > 0) or (
HIDDEN_COMPONENT == true and LOG_RESULTS == 2)) then
LogVariable(vsdDC);
LogVariable(vsbDC);
LogVariable(vsgDC);
end when;
// ---------------------
// Component connections
// ---------------------
connect(d, Rd.n);
connect(Rd.p, Isd.n);
connect(Isd.p, Rs.n);
connect(Rs.p, s);
connect(Rg.p, Cdg.n);
connect(Rg.p, Csg.n);
connect(Rg.p, Cbg.n);
connect(Rg.n, g);
connect(Rb.p, Dsb.n);
connect(Rb.p, Csb.n);
connect(Rb.p, Ddb.n);
connect(Rb.p, Cdb.n);
connect(Rb.p, Cbg.p);
connect(b, Rb.n);
connect(Isd.p, Csg.p);
connect(Isd.n, Cdg.p);
connect(Rsb.n, Csb.p);
connect(Rsb.p, Isd.p);
connect(Rdb.n, Cdb.p);
connect(Rdb.p, Rd.p);
connect(Cdb.p, Ddb.p);
connect(Dsb.p, Csb.p);
end Spice2MOS1P;
Parameters
| Name | Default | Description |
| IC | 0 | Initial voltage [V] |
| IC_ENABLED | false | IC enabled |
Modelica definition
partial model Capacitor
/*
--- Cvar and CvarAC have to be defined ---
*/
extends INTERFACE.TwoPin;
extends INIT.Part;
constant SI.Resistance R_EPS=2e-4 "IC resistor";
parameter SI.Voltage IC=0 "Initial voltage";
parameter Boolean IC_ENABLED=false "IC enabled";
constant Real pi=3.14159265358979;
SI.Capacitance Cvar(start=1e-12) "Transient analysis capacitance";
SI.Capacitance CvarAC(start=1E-12) "AC small-signal capacitance";
SI.Voltage vDC "DC voltage across the capacitor";
SI.Voltage vTran "Transient voltage across the capacitor";
SI.Voltage vAC_Re
"Real part of AC small-signal voltage across the capacitor";
SI.Voltage vAC_Im
"Imaginary part of AC small-signal voltage across the capacitor";
SI.Current iDC "DC current";
SI.Current iTran "Transient/Small-signal current";
SI.Current iAC_Re "Small-signal current. Real part";
SI.Current iAC_Im "Small-signal current. Imaginary part";
protected
SI.Current iClampTran;
SI.Voltage vClampTran;
SI.Voltage vClampDC;
SI.Time timeClampTran;
SI.Time timeClampDC;
equation
// ------------------------------------------------
// i, v sign criterion: Positive current flows from
// the (+) node through the part to the (-) node
// ------------------------------------------------
{iDC,iTran,iAC_Re,iAC_Im} = {p.iDC,p.iTran + iClampTran,p.iAC_Re,p.iAC_Im};
{iDC,iTran,iAC_Re,iAC_Im} = -{n.iDC,n.iTran - iClampTran,n.iAC_Re,n.iAC_Im};
{vDC,vTran,vAC_Re,vAC_Im} = {p.vDC,p.vTran,p.vAC_Re,p.vAC_Im} - {n.vDC,n.
vTran,n.vAC_Re,n.vAC_Im};
// ---------------
// Transient model
// ---------------
//Cvar*der(vTran) = iTran;
iClampTran = if ctrl_IC_clampTran and IC_ENABLED then (vClampTran - vTran)/
R_EPS else 0;
when ctrl_IC_clampTran and IC_ENABLED then
timeClampTran = time;
end when;
vClampTran = if ctrl_IC_clampTran and IC_ENABLED and ctrl_IC_mode == 0 then
IC else if ctrl_IC_clampTran and IC_ENABLED and ctrl_IC_mode == 1 then IC*(
time - timeClampTran)/TIME_SCALE else 0;
// Voltage initialization conditions
when ctrl_CBREAK_Tran2IC and IC_ENABLED then
reinit(vTran, IC);
end when;
when ctrl_CBREAK_Tran2DC then
reinit(vTran, vDC);
end when;
when ctrl_CBREAK_resetTran then
reinit(vTran, 0);
end when;
// ------------
// Static model
// ------------
iDC = if ctrl_IC_clampDC and IC_ENABLED then (vDC - vClampDC)/R_EPS else 0;
when ctrl_IC_clampDC and IC_ENABLED then
timeClampDC = time;
end when;
vClampDC = if ctrl_IC_clampDC and IC_ENABLED and ctrl_IC_mode == 0 then IC
else if ctrl_IC_clampDC and IC_ENABLED and ctrl_IC_mode == 1 then IC*(time
- timeClampDC)/TIME_SCALE else 0;
// ---------------------
// AC small-signal model
// ---------------------
{vAC_Re,vAC_Im}*(2*pi*freq*CvarAC) = {iAC_Im,-iAC_Re};
end Capacitor;
Parameters
| Name | Default | Description |
| IC | 0 | Initial voltage [V] |
| IC_ENABLED | false | IC enabled |
| C | 1E-9 | Capacitance [F] |
Modelica definition
model Capacitor1
extends Capacitor;
parameter SI.Capacitance C=1E-9 "Capacitance";
equation
// ---------------
// Transient model
// ---------------
Cvar*der(vTran) = iTran;
Cvar = C;
CvarAC = C;
end Capacitor1;
Parameters
| Name | Default | Description |
| IC | 0 | Initial current [V] |
| IC_ENABLED | false | IC enabled |
Modelica definition
partial model Inductor
extends INTERFACE.TwoPin;
extends INIT.Part;
constant SI.Resistance R_BIG=1e9 "IC resistor";
constant SI.Resistance R_BIG2=1e9 "Resistance to avoid high index problems";
parameter SI.Voltage IC=0 "Initial current";
parameter Boolean IC_ENABLED=false "IC enabled";
constant Real pi=3.14159265358979;
SI.Inductance Lvar "Transient analysis inductance";
SI.Inductance LvarAC(start=1E-9) "AC small-signal inductance";
SI.Voltage vDC "DC voltage across the inductor";
SI.Voltage vTran "Transient voltage across the inductor";
SI.Voltage vAC_Re
"Real part of AC small-signal voltage across the inductor";
SI.Voltage vAC_Im
"Imaginary part of AC small-signal voltage across the inductor";
SI.Current iDC "DC current";
SI.Current iTran "Transient/Small-signal current";
SI.Current iAC_Re "Small-signal current. Real part";
SI.Current iAC_Im "Small-signal current. Imaginary part";
SI.Voltage vAC_mag(start=0)
"Magnitude of AC small-signal voltage across the component";
SI.Voltage vAC_mag_dB(start=0)
"Magnitude (dB) of AC small-signal voltage across the component";
nonSI.Angle_deg vAC_phase(start=0)
"Phase (deg) of AC small-signal voltage across the component";
SI.Current iAC_mag(start=0) "Magnitude of AC small-signal current";
SI.Current iAC_mag_dB(start=0) "Magnitude (dB) of AC small-signal current";
nonSI.Angle_deg iAC_phase(start=0)
"Phase (deg) of AC small-signal current";
SI.Voltage pinP_vAC_mag(start=0);
SI.Voltage pinP_vAC_phase(start=0);
SI.Voltage pinP_vAC_mag_dB(start=0);
SI.Voltage pinN_vAC_mag(start=0);
SI.Voltage pinN_vAC_phase(start=0);
SI.Voltage pinN_vAC_mag_dB(start=0);
protected
SI.Current iClampTran;
SI.Voltage iClampDC;
SI.Voltage vClampDC;
SI.Voltage vClampTran;
SI.Time timeClampTran;
SI.Time timeClampDC;
equation
// ------------------------------------------------
// i, v sign criterion: Positive current flows from
// the (+) node through the part to the (-) node
// ------------------------------------------------
{iDC,iTran,iAC_Re,iAC_Im} = {p.iDC,p.iTran - vTran/R_BIG2,p.iAC_Re - vAC_Re/
R_BIG2,p.iAC_Im - vAC_Im/R_BIG2};
{iDC,iTran,iAC_Re,iAC_Im} = -{n.iDC,n.iTran + vTran/R_BIG2,n.iAC_Re + vAC_Re/
R_BIG2,n.iAC_Im + vAC_Im/R_BIG2};
{vDC,vTran,vAC_Re,vAC_Im} = {p.vDC - vClampDC,p.vTran - vClampTran,p.vAC_Re,p
.vAC_Im} - {n.vDC,n.vTran,n.vAC_Re,n.vAC_Im};
// ---------------
// Transient model
// ---------------
vClampTran = if ctrl_IC_clampTran and IC_ENABLED then (-iClampTran + iTran +
vTran/R_BIG2)*R_BIG else 0;
when ctrl_IC_clampTran and IC_ENABLED then
timeClampTran = time;
end when;
iClampTran = if ctrl_IC_clampTran and IC_ENABLED and ctrl_IC_mode == 0 then
IC else if ctrl_IC_clampTran and IC_ENABLED and ctrl_IC_mode == 1 then IC*(
time - timeClampTran)/TIME_SCALE else 0;
// Voltage initialization conditions
when ctrl_CBREAK_Tran2IC and IC_ENABLED then
reinit(iTran, IC);
end when;
when ctrl_CBREAK_Tran2DC then
reinit(iTran, iDC);
end when;
when ctrl_CBREAK_resetTran then
reinit(iTran, 0);
end when;
// ------------
// Static model
// ------------
vDC = 0;
vClampDC = if ctrl_IC_clampDC and IC_ENABLED then (iDC - iClampDC)*R_BIG
else 0;
when ctrl_IC_clampDC and IC_ENABLED then
timeClampDC = time;
end when;
iClampDC = if ctrl_IC_clampDC and IC_ENABLED and ctrl_IC_mode == 0 then IC
else if ctrl_IC_clampDC and IC_ENABLED and ctrl_IC_mode == 1 then IC*(time
- timeClampDC)/TIME_SCALE else 0;
// ---------------------
// AC small-signal model
// ---------------------
{vAC_Re,vAC_Im} = {iAC_Im,-iAC_Re}*(2*pi*freq*LvarAC);
(pinP_vAC_mag,pinP_vAC_phase) = Rect2Polar({p.vAC_Re,p.vAC_Im});
pinP_vAC_mag_dB = Decibels(pinP_vAC_mag);
(pinN_vAC_mag,pinN_vAC_phase) = Rect2Polar({n.vAC_Re,n.vAC_Im});
pinN_vAC_mag_dB = Decibels(pinN_vAC_mag);
(vAC_mag,vAC_phase) = Rect2Polar({vAC_Re,vAC_Im});
vAC_mag_dB = Decibels(vAC_mag);
(iAC_mag,iAC_phase) = Rect2Polar({iAC_Re,iAC_Im});
iAC_mag_dB = Decibels(iAC_mag);
end Inductor;
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